User Guide

152 128-Bit Media and Scientific Programming
AMD64 Technology 24592—Rev. 3.15—November 2009
4.5.6 Shift
The vector-shift instructions are useful for scaling vector elements to higher or lower precision,
packing and unpacking vector elements, and multiplying and dividing vector elements by powers of 2.
Left Logical Shift.
• PSLLW—Packed Shift Left Logical Words
• PSLLD—Packed Shift Left Logical Doublewords
• PSLLQ—Packed Shift Left Logical Quadwords
• PSLLDQ—Packed Shift Left Logical Double Quadword
The PSLLW, PSLLD, and PSLLQ instructions left-shift each of the 16-bit, 32-bit, or 64-bit values,
respectively, in the first operand by the number of bits specified in the second operand. The
instructions then write each shifted value into the corresponding, same-sized element of the
destination. The low-order bits that are emptied by the shift operation are cleared to 0. The first
operand is an XMM register. The second operand can be an XMM register, 128-bit memory location,
or immediate byte.
In integer arithmetic, left logical shifts effectively multiply unsigned operands by positive powers of 2.
Thus, for vectors of n number of elements, the operation is:
operand1[i] = operand1[i] * 2
operand2
where: i = 0 to n – 1
The PSLLDQ instruction differs from the other three left-shift instructions because it operates on bytes
rather than bits. It left-shifts the 128-bit (double quadword) value in an XMM register by the number
of bytes specified in an immediate byte value.
Right Logical Shift.
• PSRLW—Packed Shift Right Logical Words
• PSRLD—Packed Shift Right Logical Doublewords
• PSRLQ—Packed Shift Right Logical Quadwords
• PSRLDQ—Packed Shift Right Logical Double Quadword
The PSRLW, PSRLD, and PSRLQ instructions right-shift each of the 16-bit, 32-bit, or 64-bit values,
respectively, in the first operand by the number of bits specified in the second operand. The
instructions then write each shifted value into the corresponding, same-sized element of the
destination. The high-order bits that are emptied by the shift operation are cleared to 0. The first
operand is an XMM register. The second operand can be an XMM register, 128-bit memory location,
or immediate byte.
In integer arithmetic, right logical bit-shifts effectively divide unsigned operands by positive powers of
2, or they divide positive signed operands by positive powers of 2. Thus, for vectors of n number of
elements, the operation is: