User Guide

128-Bit Media and Scientific Programming 137
24592—Rev. 3.15—November 2009 AMD64 Technology
Figure 4-17. Integer Move Operations
MASKMOVDQU is also a non-temporal instruction. It stores bytes from the first operand, as selected
by the mask value in the second operand (0 = no write and 1 = write), to a memory location specified
in the rDI and DS registers. The first and second operands are both XMM registers. The address may
memory
513-173.eps
MOVDQA
MOVDQU
127 0127 0
MOVQ
memory
XMM Register or Memory
(source)
XMM Register
(destination)
MOVDQA
MOVDQU
127 0127 0
MOVQ
MOVD
XMM Register
(source)
XMM Register or Memory
(destination)
XMM Register
(source)
GPR Register or Memory
(destination)
127 0
63 0
memory
MOVD
XMM Register
(destination)
GPR Register or Memory
(source)
127 0
63 0
memory
XMM Register
(source)
MMX
TM
Register
(destination)
127 0
63 0
XMM Register
(destination)
MMX Register
(source)
127 0
63 0
MOVDQ2Q
MOVQ2DQ