User Guide

118 128-Bit Media and Scientific Programming
AMD64 Technology 24592—Rev. 3.15—November 2009
using the FXRSTOR or LDMXCSR instructions, and it can store the register to memory using the
FXSAVE or STMXCSR instructions.
Figure 4-13. 128-Bit Media Control and Status Register (MXCSR)
On power-on reset, all bits are initialized to the values provided in Figure 4-13. However, initialization
by means of the #INIT external input signal does not change the state of the XMM registers.
The six exception flags (IE, DE, ZE, OE, UE, PE) are sticky bits. (Once set by the processor, such a bit
remains set until software clears it.) For details about the causes of SIMD floating-point exceptions
indicated by bits 5–0, see “SIMD Floating-Point Exception Causes” on page 178. For details about the
masking of these exceptions, see “SIMD Floating-Point Exception Masking” on page 184.
Invalid-Operation Exception (IE). Bit 0. The processor sets this bit to 1 when an invalid-operation
exception occurs. These exceptions are caused by many types of errors, such as an invalid operand.
Denormalized-Operand Exception (DE). Bit 1. The processor sets this bit to 1 when one of the
source operands of an instruction is in denormalized form, except that if software has set the
31 1817161514131211109876543210
Reserved, MBZ
M
M
R
e
s
F
Z
R
C
P
M
U
M
O
M
Z
M
D
M
I
M
D
A
Z
P
E
U
E
O
E
Z
E
D
E
I
E
Bits Mnemonic Description Reset Bit-Value
31–18 – Reserved, MBZ
17 MM Misaligned Exception Mask 0
16 – Reserved, MBZ
15 FZ Flush-to-Zero for Masked Underflow 0
14–13 RC Floating-Point Rounding Control 00
Exception Masks
12 PM Precision Exception Mask 1
11 UM Underflow Exception Mask 1
10 OM Overflow Exception Mask 1
9 ZM Zero-Divide Exception Mask 1
8 DM Denormalized-Operand Exception Mask 1
7 IM Invalid-Operation Exception Mask 1
6 DAZ Denormals Are Zeros 0
Exception Flags
5 PE Precision Exception 0
4 UE Underflow Exception 0
3 OE Overflow Exception 0
2 ZE Zero-Divide Exception 0
1 DE Denormalized-Operand Exception 0
0 IE Invalid-Operation Exception 0