User Guide

Figures xi
24592—Rev. 3.15—November 2009 AMD64 Technology
Figure 4-35. ADDPS Arithmetic Operation .................................................167
Figure 4-36. CMPPD Compare Operation ..................................................172
Figure 4-37. COMISD Compare Operation .................................................174
Figure 4-38. SIMD Floating-Point Detection Process..........................................183
Figure 5-1. Parallel Integer Operations on Elements of Vectors .................................195
Figure 5-2. Unpack and Interleave Operation ...............................................196
Figure 5-3. Shuffle Operation (1 of 256) ...................................................196
Figure 5-4. Multiply-Add Operation ......................................................197
Figure 5-5. Branch-Removal Sequence ....................................................198
Figure 5-6. Floating-Point (3DNow!™ Instruction) Operations .................................199
Figure 5-7. 64-Bit Media Registers .......................................................200
Figure 5-8. 64-Bit Media Data Types .....................................................202
Figure 5-9. 64-Bit Floating-Point (3DNow!™) Vector Operand ................................205
Figure 5-10. Mnemonic Syntax for Typical Instruction ........................................208
Figure 5-11. MASKMOVQ Move Mask Operation ...........................................211
Figure 5-12. PACKSSDW Pack Operation ..................................................213
Figure 5-13. PUNPCKLWD Unpack and Interleave Operation ..................................214
Figure 5-14. PSHUFW Shuffle Operation...................................................215
Figure 5-15. PSWAPD Swap Operation ....................................................215
Figure 5-16. PMADDWD Multiply-Add Operation ...........................................218
Figure 5-17. PFACC Accumulate Operation.................................................226
Figure 6-1. x87 Registers...............................................................239
Figure 6-2. x87 Physical and Stack Registers ...............................................240
Figure 6-3. x87 Status Word Register (FSW) ...............................................242
Figure 6-4. x87 Control Word Register (FCW)..............................................244
Figure 6-5. x87 Tag Word Register (FTW) .................................................246
Figure 6-6. x87 Pointers and Opcode State .................................................247
Figure 6-7. x87 Data Types .............................................................250
Figure 6-8. x87 Floating-Point Data Types .................................................251
Figure 6-9. x87 Packed Decimal Data Type ................................................253
Figure 6-10. Mnemonic Syntax for Typical Instruction ........................................262