User Guide

General-Purpose Programming 95
24592—Rev. 3.15—November 2009 AMD64 Technology
around an MFENCE instruction, but other non-serializing instructions that do not access memory
can be reordered around the MFENCE.
Although they serve different purposes, other instructions can be used as read/write barriers when the
order of memory accesses must be strictly enforced. These read/write barrier instructions force all
prior reads and writes to complete before subsequent reads or writes are executed. Unlike the fence
instructions listed above, these other instructions alter the software-visible state. This makes these
instructions less general and more difficult to use as read/write barriers than the fence instructions,
although their use may reduce the total number of instructions executed. The following instructions are
usable as read/write barriers:
• Serializing instructions—Serializing instructions force the processor to commit the serializing
instruction and all previous instructions before the next instruction is fetched from memory. The
serializing instructions available to applications are CPUID and IRET. A serializing instruction is
committed when the following operations are complete:
- The instruction has executed.
- All registers modified by the instruction are updated.
- All memory updates performed by the instruction are complete.
- All data held in the write buffers have been written to memory. (Write buffers are described in
“Write Buffering” on page 97).
• I/O instructions—Reads from and writes to I/O-address space use the IN and OUT instructions,
respectively. When the processor executes an I/O instruction, it orders it with respect to other loads
and stores, depending on the instruction:
- IN instructions (IN, INS, and REP INS) are not executed until all previous stores to memory
and I/O-address space are complete.
- Instructions following an OUT instruction (OUT, OUTS, or REP OUTS) are not executed until
all previous stores to memory and I/O-address space are complete, including the store
performed by the OUT.
• Locked instructions—A locked instruction is one that contains the LOCK instruction prefix. A
locked instruction is used to perform an atomic read-modify-write operation on a memory
operand, so it needs exclusive access to the memory location for the duration of the operation.
Locked instructions order memory accesses in the following way:
- All previous loads and stores (in program order) are completed prior to executing the locked
instruction.
- The locked instruction is completed before allowing loads and stores for subsequent
instructions (in program order) to occur.
Only certain instructions can be locked. See “Lock Prefix” in Volume 3 for a list of instructions that
can use the LOCK prefix.