User Guide

General-Purpose Programming 93
24592—Rev. 3.15—November 2009 AMD64 Technology
techniques that can be implemented within a system design, and how applications can optimize their
use.
3.9.1 Accessing Memory
Implementations of the AMD64 architecture commit the results of each instruction—i.e., store the
result of the executed instruction in software-visible resources, such as a register (including flags), the
data cache, an internal write buffer, or memory—in program order, which is the order specified by the
instruction sequence in a program. Transparent to the application, implementations can execute
instructions in any order and temporarily hold out-of-order results until the instructions are committed.
Implementations can also speculatively execute instructions—executing instructions before knowing
their results will be used (for example, executing both sides of a branch). By executing instructions
out-of-order and speculatively, a processor can boost application performance by executing
instructions that are ready, rather than delaying them behind instructions that are waiting for data.
However, the processor commits results in program order (the order expected by software).
When executing instructions out-of-order and speculatively, processor implementations often find it
useful to also allow out-of-order and speculative memory accesses. However, such memory accesses
are potentially visible to software and system devices. The following sections describe the
architectural rules for memory accesses. See “Memory System” in Volume 2 for information on how
system software can further specify the flexibility of memory accesses.
Read Ordering. The ordering of memory reads does not usually affect program execution because
the ordering does not usually affect the state of software-visible resources. The rules governing read
ordering are:
• Out-of-order reads are allowed. Out-of-order reads can occur as a result of out-of-order instruction
execution. The processor can read memory out-of-order to prevent stalling instructions that are
executed out-of-order.
• Speculative reads are allowed. A speculative read occurs when the processor begins executing a
memory-read instruction before it knows whether the instruction’s result will actually be needed.
For example, the processor can predict a branch to occur and begin executing instructions
following the predicted branch, before it knows whether the prediction is valid. When one of the
speculative instructions reads data from memory, the read itself is speculative.
• Reads can usually be reordered ahead of writes. Reads are generally given a higher priority by the
processor than writes because instruction execution stalls if the read data required by an instruction
is not immediately available. Allowing reads ahead of writes usually maximizes software
performance.
Reads can be reordered ahead of writes, except that a read cannot be reordered ahead of a prior
write if the read is from the same location as the prior write. In this case, the read instruction stalls
until the write instruction is committed. This is because the result of the write instruction is
required by the read instruction for software to operate correctly.