User Guide

General-Purpose Programming 91

24592—Rev. 3.15—November 2009 AMD64 Technology

Figure 3-18. I/O Address Space

Memory-Mapped I/O. Memory-mapped I/O devices are attached to the system memory bus and

respond to memory transactions as if they were memory devices, such as DRAM. Access to memory-

mapped I/O devices can be performed using any instruction that accesses memory, but typically MOV

instructions are used to transfer data between the processor and the device. Some I/O devices may have

restrictions on read-modify-write accesses.

Any location in memory can be used as a memory-mapped I/O address. System software can use the

paging facilities to virtualize memory devices and protect them from unauthorized access. See

“System-Management Instructions” in Volume 2 for a discussion of memory virtualization and

paging.

3.8.2 I/O Ordering

The order of read and write accesses between the processor and an I/O device is usually important for

properly controlling device operation. Accesses to I/O-address space and memory-address space differ

in the default ordering enforced by the processor and the ability of software to control ordering.

I/O-Address Space. The processor always orders I/O-address space operations strongly, with respect

to other I/O and memory operations. Software cannot modify the I/O ordering enforced by the

processor. IN instructions are not executed until all previous writes to I/O space and memory have

completed. OUT instructions delay execution of the following instruction until all writes—including

the write performed by the OUT—have completed. Unlike memory writes, writes to I/O addresses are

never buffered by the processor.

The processor can use more than one bus transaction to access an unaligned, multi-byte I/O port.

Unaligned accesses to I/O-address space do not have a defined bus transaction ordering, and that

ordering can change from one implementation to another. If the use of an unaligned I/O port is

required, and the order of bus transactions to that port is important, software should decompose the

access into multiple, smaller aligned accesses.

Memory-Mapped I/O. To maximize software performance, processor implementations can execute

instructions out of program order. This can cause the sequence of memory accesses to also be out of

program order, called weakly ordered. As described in “Accessing Memory” on page 93, the processor

can perform memory reads in any order, it can perform reads without knowing whether it requires the

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