User Guide

General-Purpose Programming 75
24592—Rev. 3.15—November 2009 AMD64 Technology
After software has determined that the processor implementation supports the CPUID instruction,
software can test for support of specific features by loading a function code (value) into the EAX
register and executing the CPUID instruction. Processor feature information is returned in the EAX,
EBX, ECX, and EDX registers, as described fully in “CPUID” in Volume 3.
The architecture supports CPUID information about standard functions and extended functions. In
general, standard functions include the earliest features offered in the x86 architecture. Extended
functions include newer features of the x86 and AMD64 architectures, such as SSE, SSE2, SSE3, and
3DNow! instructions, and long mode.
Standard functions are accessed by loading EAX with the value 0 (standard-function 0) or 1 (standard-
function 1) and executing the CPUID instruction. All software using the CPUID instruction must
execute standard-function 0, which identifies the processor vendor and the largest standard-function
input value supported by the processor implementation. The CPUID standard-function 1 returns the
processor version and standard-feature bits.
Software can test for support of extended functions by first executing the CPUID i nstruction with the
value 8000_0000h in EAX. The processor returns, in EAX, the largest extended-function input value
defined for the CPUID instruction on the processor implementation. If the value in EAX is greater than
8000_0000h, extended functions are supported, although specific extended functions must be tested
individually.
The following code sample shows how to test for support of any extended functions:
mov eax, 80000000h ; query for extended functions
CPUID ; get extended function limit
cmp eax, 80000000h ; is EAX greater than 80000000?
jbe NO_EXTENDEDMSR ; no extended-feature support
If extended functions are supported, software can test for support of specific extended features. For
example, software can determine whether the processor implementation supports long mode by
executing the CPUID instruction with 8000_0001h in the EAX register, then testing to see if bit 29 in
the EDX register is set to 1. The following code sample shows how to test for long-mode support.
mov eax, 80000001h ; query for function 8000_0001h
CPUID ; get feature bits in EDX
test edx, 20000000h ; test bit 29 in EDX
jnz YES_Long_Mode ; long mode is supported
With a few exceptions, general-purpose instructions are supported in all hardware implementations of
the AMD64 architecture, Exceptional instructions are implemented only if their associated CPUID
function bit is set. The implementation of certain media instructions (such as FXSAVE and
FXRSTOR) and system instructions (such as RDMSR and WRMSR) is also indicated by CPUID
function bits. See “CPUID” in the AMD64 Architecture Programmer’s Manual Volume 3: General
Purpose and System Instructions, order# 24594, and the CPUID Specification, order# 25481, for a full
description of the CPUID instruction, all CPUID standard and extended functions, and the proper
interpretation of returned values.