User`s manual

PPC405CR – AMCC PowerPC 32-bit RISC Processor
On-Chip Debugging
To facilitate real-time debugging of the processor, the PPC405CR includes On-Chip Debug hardware that can be accessed
using the standard JTAG interface.
With this hardware, the following set of additional functional features are provided:
• Reset, Go, Halt processor control
• Single or multi-step debugging
• Read-write access for internal processor registers
• Read-write access for memory and I/O space
• Unlimited software breakpoints.
Accessing the Debug Environment
You can have multiple debug
sessions running simultaneously
– one per embedded software
project associated with a
processor in the design.
To start a debug session for the
embedded code running in a
'soft' processor in the design,
simply right-click on the icon for
that processor, in the Soft
Devices region of the view, and
choose the
Debug command
from the menu.
Debugging of the embedded code within a PPC405CR processor is carried out by starting a
debug session. Prior to starting the session, you must ensure that the FPGA design has been
downloaded to the target FPGA device and the embedded code has been downloaded to the
physical PPC405CR device (see
Downloading your design).
To start a debug session for the embedded code running in the PPC405CR, simply right-click on
the icon for the physical device in the Hard Devices region of the
Devices view, and choose the
Debug command from the pop-up menu that appears.
The embedded project for the software running in the processor will initially be recompiled and the
debug session will commence. The relevant source code document (either Assembly or C) will be
opened and the current execution point will be set to the first line of executable code (see Figure
13).
Figure 13. Starting an embedded code debug session.
22 CR0161 (v2.0) March 11, 2008