Specifications
PPC405EP – PowerPC 405EP Embedded Processor
Revision 1.08 – March 24, 2008
AMCC 37
Data Sheet
Note:
1. For a chip mounted on a JEDEC 2S2P card without a heat sink.
2. For a chip mounted on a card with at least one signal and two power planes, the following relationships exist:
a. Case temperature, T
C
, is measured at top center of case surface with device soldered to circuit board.
b. T
A
= T
C
– P×θ
CA
, where T
A
is ambient temperature and P is power consumption.
c. T
CMax
= T
JMax
– P×θ
JC
, where T
JMax
is maximum junction temperature and P is power consumption.
Table 8. Package Thermal Specifications
The PPC405EP is designed to operate within a case temperature range of -40°C to +85°C. Thermal resistance values for the E-
PBGA packages in a convection environment are as follows:
Package—Thermal Resistance Symbol
Airflow
ft/min (m/sec)
Unit
0 (0) 100 (0.51) 200 (1.02)
31mm, 385-balls—Junction-to-Case
θ
JC
222°C/W
31mm, 385-balls—Case-to-Ambient
1
θ
CA
17.8 16.8 16.1 °C/W
Table 9. Recommended DC Operating Conditions (Sheet 1 of 2)
Device operation beyond the conditions specified is not recommended. Extended operation beyond the recommended
conditions can affect device reliability.
Notes:
1. PCI drivers meet PCI specifications.
2. See “5V-Tolerant Input Current” on page 39.
Parameter Symbol Minimum Typical Maximum Unit Notes
Logic Supply Voltage (133, 200, 266MHz)
V
DD
+1.65 +1.8 +1.95 V
Logic Supply Voltage (333MHz)
V
DD
+1.7 +1.8 +1.9 V
I/O Supply Voltage
OV
DD
+3.0 +3.3 +3.6 V
PLL Supply Voltage (133, 200, 266MHz)
AV
DD
+1.65 +1.8 +1.95 V
PLL Supply Voltage (333MHz)
AV
DD
+1.7 +1.8 +1.9 V
Input Logic High
(1.8V CMOS receivers)
V
IH
0.65V
DD
V
DD
V
Input Logic High
(3.3V PCI receivers)
V
IH
0.5OV
DD
OV
DD
+0.5
V
Input Logic High
(3.3V LVTTL, 5V tolerant receivers)
V
IH
+2.0 +5.5 V
Input Logic Low
(1.8V CMOS receivers)
V
IL
0
0.65V
DD
V
Input Logic Low
(3.3V PCI receivers)
V
IL
-0.5
0.35OV
DD
V
Input Logic Low
(3.3V LVTTL, 5V tolerant receivers)
V
IL
0+0.8V
Output Logic High
(3.3V PCI receivers)
V
OH
0.9OV
DD
OV
DD
V
Output Logic High
(3.3V LVTTL, 5V tolerant receivers)
V
OH
+2.4
OV
DD
V
Output Logic Low
(3.3V PCI receivers)
V
OL
-0.5
0.35OV
DD
V
Output Logic Low
(3.3V LVTTL, 5V tolerant receivers)
V
OL
0+0.4V