User guide

Chapter 6: Board Test System 6–3
Using the Board Test System
December 2014 Altera Corporation Stratix V GX FPGA Development Kit
User Guide
1 If you power up your board with the DIP switch SW5.3 in a position other than the on
(user hardware 1) position, or if you load your own design into the FPGA with the
Quartus II Programmer, you receive a message prompting you to configure your
board with a valid Board Test System design. Refer to “The Configure Menu” for
information about configuring your board.
Using the Board Test System
This section describes each control in the Board Test System application.
The Configure Menu
Use the Configure menu (Figure 6–2) to select the design you want to use. Each design
example tests different board features. Choose a design from this menu and the
corresponding tabs become active for testing.
To configure the FPGA with a test system design, perform the following steps:
1. On the Configure menu, click the configure command that corresponds to the
functionality you wish to test.
2. When configuration finishes, close the Quartus II Programmer if open. The design
begins running in the FPGA. The corresponding GUI application tabs that
interface with the design are now enabled.
1 If the Board Test System is open while you configure FPGAs with the
Quartus II Programmer, to use the BTS again, you may need to restart it.
The System Info Tab
The System Info tab shows information about the board’s current configuration.
Figure 6–1 on page 6–1 shows the System Info tab. The tab displays the contents of
the MAX V registers, the JTAG chain, the board’s MAC address, the flash memory
map, and other details stored on the board.
The following sections describe the controls on the System Info tab.
Figure 6–2. The Configure Menu