User guide
Chapter 3: Parameter Settings 3–13
DDR3 SDRAM Controller with ALTMEMPHY Parameter Settings
December 2010 Altera Corporation External Memory Interface Handbook Volume 3
Section II. DDR3 SDRAM Controller with ALTMEMPHY IP User Guide
Board Settings
Click Next or the Board Settings tab to set the options described in Table 3–7. The
board settings parameters are set to model the board level effects in the timing
analysis. The options are available if you choose Arria II GX or Stratix IV device for
your interface. Otherwise, the options are disabled.
DDR3 SDRAM Controller with ALTMEMPHY Parameter Settings
The Parameter Settings page in the DDR3 SDRAM Controller with ALTMEMPHY
parameter editor (Figure 3–3) allows you to parameterize the following settings:
■ Memory Settings
■ PHY Settings
■ Board Settings
■ Controller Settings
Table 3–7. ALTMEMPHY Board Settings
Parameter Name Units Description
Number of slots/discrete devices — Sets the single-rank or multi-rank configuration.
CK/CK# slew rate (differential) V/ns Sets the differential slew rate for the CK and CK# signals.
Addr/command slew rate V/ns Sets the slew rate for the address and command signals.
DQ/DQS# slew rate (differential) V/ns Sets the differential slew rate for the DQ and DQS# signals.
DQ slew rate V/ns Sets the slew rate for the DQ signals.
Addr/command eye reduction
(setup)
ns
Sets the reduction in the eye diagram on the setup side due to the
ISI on the address and command signals.
Addr/command eye reduction
(hold)
ns
Sets the reduction in the eye diagram on the hold side due to the ISI
on the address and command signals.
DQ eye reduction ns
Sets the total reduction in the eye diagram on the setup side due to
the ISI on the DQ signals.
Delta DQS arrival time ns
Sets the increase of variation on the range of arrival times of DQS
due to ISI.
Min CK/DQS skew to DIMM ns
Sets the minimum skew between the CK signal and any DQS signal
when arriving at the same DIMM over all DIMMs.
Max CK/DQS skew to DIMM ns
Sets the maximum skew between the CK signal and any DQS signal
when arriving at the same DIMM over all DIMMs.
Max skew between
DIMMs/devices
ns
Sets the largest skew or propagation delay on the DQ signals
between ranks, especially true for DIMMs in different slots.
Max skew within DQS group ns Sets the largest skew between the DQ pins in a DQS group.
Max skew between DQS groups ns Sets the largest skew between DQS signals in different DQS groups.
Addr/command to CK skew ns
Sets the skew or propagation delay between the CK signal and the
address and command signals. The positive values represent the
address and command signals that are longer than the CK signals,
and the negative values represent the address and command signals
that are shorter than the CK signals.