User guide

Chapter 9: Timing Diagrams 9–3
DDR3 High-Performance Controllers
December 2010 Altera Corporation External Memory Interface Handbook Volume 3
Section II. DDR3 SDRAM Controller with ALTMEMPHY IP User Guide
User Refresh
Figure 9–2 shows the user refresh control interface. This feature allows you to control
when the controller issues refreshes to the memory. This feature allows better control
of worst case latency and allows refreshes to be issued in bursts to take advantage of
idle periods.
Figure 9–2. User-Refresh Operation for HPC
Notes to Figure 9–2:
(1) The local refresh request signal is asserted.
(2) The controller asserts the
local_refresh_ack signal.
(3) The auto-refresh (ARF) command on the command bus.
global_reset_n
phy_clk
mem_local_refresh_req
local_init_done
local_refresh_ack
local_refresh_req
local_refresh_ack
local_ready
ddr_a[13:0]
ddr_ba[2:0]
ddr_cs_n
ddr_cke_h
ddr_cke_l
ddr_ras_n
ddr_cas_n
ddr_we_n
Mem Command[2:0]
ARFNOP NOP
[1]
[2]
[3]
Local Interface
Controller - AFI
AFI Memory Interface