User guide

1–6 Chapter 1: About This IP
Resource Utilization
External Memory Interface Handbook Volume 3 December 2010 Altera Corporation
Section II. DDR3 SDRAM Controller with ALTMEMPHY IP User Guide
Table 1–4. Resource Utilization in Arria II GX Devices (Note 1)
Memory Type
PHY
Rate
Memory
Width
(Bits)
Combinational
ALUTS
Logic Registers
M9K
Blocks
Memory
ALUTs
DDR3 SDRAM (without
leveling)
Half
8 1,431 1,189 2 18
16 1,481 1,264 4 2
64 1,797 1,970 12 22
72 1,874 2,038 13 2
Note to Table 1–4:
(1) The listed resource utilization refers to resources used by the ALTMEMPHY megafunction with AFI only. Memory controller overhead is
additional.
Table 1–5. Resource Utilization in Stratix III and Stratix IV Devices (Note 1)
Memory Type
PHY
Rate
Memory
Width
(Bits)
Combinational
ALUTS
Logic Registers
M9K
Blocks
Memory
ALUTs
DDR3 SDRAM
(400 MHz, without leveling
only)
Half
8 1,359 1,047 1 40
16 1,426 1,196 1 80
64 1,783 2,080 1 320
72 1,871 2,228 1 360
DDR3 SDRAM
(400 MHz, with leveling only)
8 3,724 2,723 2 80
16 4,192 3,235 2 160
64 6,835 6,487 5 640
72 7,182 6,984 5 720
DDR3 SDRAM
(533 MHz with read and write
deskew, with leveling only)
8 4,098 2,867 2 80
16 4,614 3,391 2 160
64 7,297 6,645 5 640
72 7,641 7,144 5 720
Note to Table 1–5:
(1) The listed resource utilization refers to resources used by the ALTMEMPHY megafunction with AFI only. Memory controller overhead is
additional.