User guide

Table 2-56: Bit Encodings for 10GBASE-R , 10GBASE-KR with FEC, and Basic KR FEC
Name Bit Functionality
rx_control
[0] XGMII control signal for parallel_data[7:0]
[1] XGMII control signal for parallel_data[15:8]
[2] XGMII control signal for parallel_data[23:16]
[3] XGMII control signal for parallel_data[31:24]
[4] XGMII control signal for parallel_data[39:32]
[5] XGMII control signal for parallel_data[47:40]
[6] XGMII control signal for parallel_data[55:48]
[7] XGMII control signal for parallel_data[63:56]
[8] Active high status signal that indicates the beginning of a receiver KR
FEC frame boundary.
[9] Active high status signal that indicates when KR FEC block is achieved.
Table 2-57: Bit Encodings for Basic Single Width Mode
For basic single width mode, the total word length is 66-bit with 64-bit data and 2-bit synchronous header.
Name Bit Functionality Description
rx_control
[1:0] Synchronous header The value 2'b01 indicates a data word. The
value 2'b10 indicates a control word.
[7:2] Unused
[9:8] Synchronous header error status The value 2'b01 indicates a data word. The
value 2'b10 indicates a control word.
[19:10] Unused
2-66
Enhanced PCS TX and RX Control Ports
UG-01143
2015.05.11
Altera Corporation
Implementing Protocols in Arria 10 Transceivers
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