User guide

Enhanced PCS RX Control Port Bit Encodings
Table 2-55: Bit Encodings for Interlaken
Name Bit Functionality Description
rx_
control
[1:0]
Synchronous header The value 2'b01 indicates a data word.
The value 2'b10 indicates a control
word.
[2] Inversion control A logic low indicates that the built-in
disparity generator block in the
Enhanced PCS maintains the
Interlaken running disparity. In the
current implementation, this bit is
always tied logic low (1'b0).
[3] Payload word location A logic high (1'b1) indicates the
payload word location in a
metaframe.
[4] Synchronization word location A logic high (1'b1) indicates the
synchronization word location in a
metaframe.
[5] Scrambler state word location A logic high (1'b1) indicates the
scrambler word location in a
metaframe.
[6] SKIP word location A logic high (1'b1) indicates the SKIP
word location in a metaframe.
[7] Diagnostic word location A logic high (1'b1) indicates the
diagnostic word location in a
metaframe.
[8] Synchronization header error, metaframe
error, or CRC32 error status
A logic high (1'b1) indicates synchro‐
nization header error, metaframe
error, or CRC32 error status.
[9] Block lock and frame lock status A logic high (1'b1) indicates that
block lock and frame lock have been
achieved.
[19:10
]
Unused
UG-01143
2015.05.11
Enhanced PCS TX and RX Control Ports
2-65
Implementing Protocols in Arria 10 Transceivers
Altera Corporation
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