User guide

Parameter Value Description
Clear all
profiles
- Clicking this button clears the Native PHY parameter settings for all the profiles.
Refresh
selected
profile
- Clicking this button is equivalent to clicking the “Load configuration from
selected profile” and “Store configuration to selected profile” buttons in sequence.
This operation loads the Native PHY parameter settings from stored profile
specified by the “Selected reconfiguration profile” parameter and subsequently
stores or saves the parameters back to the profile.
Table 2-36: Generation Options
Parameter Value Description
Generate parameter
documentation file
On/Off When you turn on this option, generation produces a Comma-
Separated Value File (.csv ) with descriptions of the Transceiver
Native PHY IP parameters.
Related Information
Reconfiguration Interface and Dynamic Reconfiguration on page 6-1
PMA Ports
This section describes the PMA and calibration ports for the Arria 10 Transceiver Native PHY IP core.
The following tables, the variables represent these parameters:
• <n>—The number of lanes
• <d>—The serialization factor
• <s>—The symbol size
• <p>—The number of PLLs
Table 2-37: TX PMA Ports
Name Direction Clock Domain Description
tx_serial_
data[<n>-1:0]
Input N/A
This is the serial data output of the TX PMA.
tx_serial_clk0 Input Clock This is the serial clock from the TX PLL. The
frequency of this clock depends on the data rate and
clock division factor. This clock is for non bonded
channels only. For bonded channels use the tx_
bonding_clocks clock TX input.
tx_bonding_
clocks[<n><6>-
1:0]
Input Clock This is a 6-bit bus which carries the low speed
parallel clock per channel. These clocks are outputs
from the master CGB. Use these clocks for bonded
channels only.
Optional Ports
UG-01143
2015.05.11
PMA Ports
2-49
Implementing Protocols in Arria 10 Transceivers
Altera Corporation
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