User guide

Parameter Range Description
Enable rx_std_
byterev_ena port
On / Off When you turn on this option and assert the rx_std_
byterev_ena input control port, the order of the individual 8-
or 10-bit words received from the PMA is swapped.
Enable RX polarity
inversion
On / Off
When you turn on this option, the rx_std_polinv port
inverts the polarity of RX parallel data. When you turn on this
parameter, you also need to enable Enable rx_polinv port.
Enable rx_polinv
port
On / Off When you turn on this option, the rx_polinv input is enabled.
You can use this control port to swap the positive and negative
signals of a serial differential link if they were erroneously
swapped during board layout.
Enable rx_std_
signaldetect port
On / Off When you turn on this option, the optional rx_std_
signaldetect output port is enabled. This signal is required
for the PCI Express protocol. If enabled, the signal threshold
detection circuitry senses whether the signal level present at
the RX input buffer is above the signal detect threshold voltage
that you specified. You can specify the signal detect threshold
using a Quartus II Assignment Editor / .qsf.
Table 2-30: PCIe Ports
Parameter Range Description
Enable PCIe
dynamic
datarate switch
ports
On / Off When you turn on this option, the pipe_rate, pipe_sw, and
pipe_sw_done ports are enabled. You should connect these
ports to the PLL IP instance in multi-lane PCIe Gen2 and Gen3
configurations. The pipe_sw and pipe_sw_done ports are only
available for multi-lane bonded configurations.
Enable PCIe
pipe_hclk_in
and pipe_hclk_
out ports
On / Off When you turn on this option, the pipe_hclk_in, and pipe_
hclk_out ports are enabled. These ports must be connected to
the PLL IP instance for the PCI Express configurations.
Enable PCIe
Gen3 analog
control ports
On / Off When you turn on this option, the pipe_g3_txdeemph and
pipe_g3_rxpresenthint ports are enabled. You can use these
ports for equalization for Gen3 configurations.
Enable PCIe
electrical idle
control and
status ports
On / Off When you turn on this option, the pipe_rx_eidleinfersel
and pipe_rx_elecidle ports are enabled. These ports are used
for PCI Express configurations.
UG-01143
2015.05.11
Standard PCS Parameters
2-45
Implementing Protocols in Arria 10 Transceivers
Altera Corporation
Send Feedback