User guide

Parameter Range Description
Number of word
alignment patterns to
achieve sync
0-255 Specifies the number of valid word alignment patterns that
must be received before the word aligner achieves synchro‐
nization lock. The default is 3.
Number of invalid words
to lose sync
0-63 Specifies the number of invalid data codes or disparity
errors that must be received before the word aligner loses
synchronization. The default is 3.
Number of valid data
words to decrement error
count
0-255 Specifies the number of valid data codes that must be
received to decrement the error counter. If the word
aligner receives enough valid data codes to decrement the
error count to 0, the word aligner returns to synchroniza‐
tion lock.
Enable Fast Syncstatus
reporting for determin‐
istic latency SM after RX-
word aligner mode
On / Off When enabled, the rx_syncstatus asserts high
immediately after the deserializer has completed slipping
the bits to achieve word alignment. When it is not selected,
rx_syncstatus will assert after the cycle slip operation is
complete and the word alignment pattern is detected by
the PCS (i.e. rx_patterndetect is asserted). This
parameter is only applicable when the selected protocol is
CPRI (Auto).
Enable fast sync status
reporting for determin‐
istic Latency SM
On / Off If this parameter is selected, the word align status signal is
asserted high once cycle slip operation between PCS and
PMA is done. Otherwise, the word align status is asserted
after the cycle slip operation is done, and it is detected that
the word align pattern comes in aligned to the PCS. This
parameter selection takes effect only if the selected
protocol mode is CPRI (Auto).
Enable rx_std_wa_
patternalign port
On / Off Enables the rx_std_wa_patternalign port. When the
word aligner is configured in manual mode and when this
signal is enabled, the word aligner aligns to next incoming
word alignment pattern.
Enable rx_std_wa_
a1a2size port
On / Off Enables the optional rx_std_wa_a1a2size control input
port.
Enable rx_std_bitslip‐
boundarysel port
On / Off Enables the optional rx_std_bitslipboundarysel status
output port.
Enable rx_bitslip port On / Off Enables the rx_bitslip port. This port is shared between
the Standard PCS and Enhanced PCS.
UG-01143
2015.05.11
Standard PCS Parameters
2-43
Implementing Protocols in Arria 10 Transceivers
Altera Corporation
Send Feedback