User guide

Parameter Range Description
Enable tx_enh_fifo_
pfull port
On / Off Enables the tx_enh_fifo_pfull port. This signal
indicates when the TX FIFO reaches the specified partially
full threshold. This signal is synchronous to tx_
coreclkin.
Enable tx_enh_fifo_
empty port
On / Off Enables the tx_enh_fifo_empty port. This signal
indicates when the TX FIFO reaches the specified empty
threshold. This is an asynchronous signal.
Enable tx_enh_fifo_
pempty port
On / Off Enables the tx_enh_fifo_pempty port. This signal
indicates when the TX FIFO reaches the specified partially
empty threshold. This is an asynchronous signal.
Table 2-12: Enhanced PCS RX FIFO Parameters
Parameter Range Description
RX FIFO Mode
Phase-Compensa‐
tion
Register
Interlaken
10GBASE-R
Basic
Specifies one of the following modes for Enhanced PCS RX
FIFO:
• Phase Compensation: This mode compensates for the clock
phase difference between the read clocks (rx_coreclkin or
tx_clkout) and the write clock (rx_clkout).
• Register : The RX FIFO is bypassed. The rx_parallel_
data, rx_control, and rx_enh_data_valid are registered
at the FIFO output.
• Interlaken: Select this mode for the Interlaken protocol. To
implement the deskew process, you must implement an
FSM that controls the FIFO operation based on FIFO flags.
In this mode the FIFO acts as an elastic buffer.
• 10GBASE-R: In this mode, data passes through the FIFO
after block lock is achieved. OS (Ordered Sets) are deleted
and Idles are inserted to compensate for the clock difference
between the RX PMA clock and the fabric clock of +/- 100
ppm for a maximum packet length of 64000 bytes.
• Basic: In this mode, the RX FIFO acts as an elastic buffer.
The gearbox data valid flag controls the FIFO read enable.
You can monitor the rx_enh_fifo_pfull and rx_enh_
fifo_empty flags to determine whether or not to read from
the FIFO.
RX FIFO
partially full
threshold
0-31 Specifies the partially full threshold for the Enhanced PCS RX
FIFO. The default value is 23.
RX FIFO
partially empty
threshold
0-31 Specifies the partially empty threshold for the Enhanced PCS
RX FIFO. The default value is 2.
2-32
Enhanced PCS Parameters
UG-01143
2015.05.11
Altera Corporation
Implementing Protocols in Arria 10 Transceivers
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