User guide

Chapter Document
Version
Changes Made
Using the Arria 10
Transceiver Native
PHY IP
2014.08.15 Made the following changes:
• Updated references of MegaWizard Plug-In Manager to IP
Catalog and Parameter Editor.
• Added PCS Direct block in figure "Transceiver Native PHY IP
Top Level Interfaces and Functional Blocks".
• Updated figure "Transceiver Native PHY IP GUI" for 14.0A10
release IP GUI.
• Updated General and Datapath Parameters section
• Updated parameter descriptions in table "General and
Datapath Options".
• Updated parameter descriptions in table "Transceiver
Configuration Rule Parameters".
• Updated PMA Parameters section
• Updated parameter descriptions in tables "TX PMA Bonding
options", "TX PLL Options", "RX PMA Parameters".
• Added description for CTLE adaptation mode and updated
description for DFE adaptation mode.
• Enhanced PCS Parameters section
• Added a new table "Enhanced PCS Parameters"
• Updated the parameter descriptions in tables "Enhanced
PCS TX FIFO Parameters", "Enhanced PCS RX FIFO
Parameters", "Interlaken Frame Generator Parameters",
"Interlaken Frame Synchronizer Parameters", "10GBASE-R
BER Checker Parameters", "Scrambler-Descrambler
Parameters", "Block Synchronizer Parameters", "Gearbox
Parameters".
• Added descriptions in "KR-FEC Parameters" table.
• Standard PCS Parameters
• Updated the descriptions in tables "TX and RX FIFO
Parameters", "Rate Match FIFO Parameters", "Word Aligner
and Bitslip Parameters", and "PCIe Ports".
• Dynamic Reconfiguration Parameters
• Removed Enable Embedded JTAG Avalon-MM Master
parameter and added Altera Debug Master Endpoint
parameter and updated its description.
• Added a table for "Embedded Debug Parameters".
• Updated the figure "Directory Structure for Generated Files" in
IP Core File Locations section.
• Changed "one-time" to "triggered" adaptation mode for DFE
and CTLE.
9-22
Document Revision History for Previous Releases
UG-01143
2015.05.11
Altera Corporation
Document Revision History for Current Release
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