User guide

Chapter Document
Version
Changes Made
Reconfiguration
Interface and
Dynamic Reconfigu‐
ration
2014.12.15 Made the following changes:
Re-organized the chapter outline to better match the
reconfiguration flow.
Updated the introduction section of the chapter to better
explain dynamic reconfiguration use cases.
Added figures Reconfiguration Interface in Arria 10
Transceiver IP Cores and Top Level Signals of the Reconfigu‐
ration Interface.
Added Timing Closure Recommendations section.
Changed Max Vod Value in Table: PMA Analog Feature
Offsets.
Updated Table: Valid Maximum Pre-Emphasis Settings.
Updated the Ports and Parameters section:
Updated the description to better indicate the difference
between "Shared" and "Not Shared" reconfiguration
interface.
Updated Avalon clock frequency to 100 MHz.
Updated the signal names in Table: Reconfiguration
Interface Ports with Shared Reconfiguration Interface
Enabled and Reconfiguration Interface Ports with Shared
Reconfiguration Interface Disabled.
Added a description in Interfacing with Reconfiguration
Interface section to indicate the steps to request access of the
Avalon-MM interface.
Updated steps in Performing a Read to the Reconfiguration
Interface and Performing a Write to the Reconfiguration
Interface sections.
Updated Using Configuration Files section to with a detailed
description of when to use configuration files.
Updated the steps in Switching Transmitter PLL, Switching
Reference Clocks, and Changing PMA Analog Parameters
sections.
Calibration
2014.12.15 Initial release.
Analog Parameter
Settings
2014.12.15 Made the following changes:
Modified the Rules section for XCVR_A10_TX_
COMPENSATION_EN.
Changed Available Options for XCVR_A10_RX_ONE_
STAGE_ENABLE parameter settings table.
Changed the "XCVR_A10_RX_ADP_CTLE_ACGAIN_4S"
parameter setting.
Added "XCVR_VCCR_VCCT_VOLTAGE" parameter
setting.
UG-01143
2015.05.11
Document Revision History for Previous Releases
9-19
Document Revision History for Current Release
Altera Corporation
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