User guide

Chapter Document Version Changes Made
Other Protocols 2015.05.11 Made the following changes:
Updated the "Connection Guidelines for
a PCS Direct PHY Design" figure.
Updated the "Connection Guidelines for
an Enhanced PCS in Low Latency Mode
Design" figure.
Updated the description following the
"Rate Match FIFO Insertion with Four
Skip Patterns Required for Insertion"
figure.
Added a Note to the "TX Bit Slip"
section.
Changed the value for rx_parallel_data
in the "TX Bit Slip in 8-bit Mode" and
"TX Bit Slip in 16-bit Mode" figures.
XAUI PHY IP Core
2015.05.11 Made the following changes:
Removed the set_max_skew constraint
from the "XAUI PHY TimeQuest SDC
Constraints" section.
Using the Arria 10
Transceiver Native PHY IP
Core
2015.05.11 Made the following changes:
UG-01143
2015.05.11
Document Revision History for Current Release
9-5
Document Revision History for Current Release
Altera Corporation
Send Feedback