User guide

Unsupported Features
The following features are not supported by either the Transceiver Native PHY IP or the PLL IP
reconfiguration interface:
• Reconfiguration from a bonded configuration to a non-bonded configuration, or vice versa
• Reconfiguration from a bonded protocol to another bonded protocol
• Reconfiguration from PCIe (with Hard IP) to PCIe (without Hard IP) or non-PCIe bonded protocol
switching
• Switching between bonding schemes, such as xN to feedback compensation
• Master CGB reconfiguration
• Switching between two master CGBs
• Serialization factor changes on bonded channels
• TX PLL switching on bonded channels
Note:
Transceiver Native PHY IP non-bonded configuration to another Transceiver Native PHY IP non-
bonded configuration is supported.
Arria 10 Transceiver Register Map
The transceiver register map provides a list of available PCS, PMA, and PLL addresses that are used in the
reconfiguration process.
Use the register map in conjunction with a transceiver configuration file generated by the Arria 10 Native
PHY IP core. This configuration file includes details about the registers that are set for a specific
transceiver configuration. Do not use the register map to locate and modify specific registers in the
transceiver. Doing so may result in an illegal configuration. Refer to a valid transceiver configuration file
for legal register values and combinations.
The register map is provided as an Excel spreadsheet for easy search and filtering.
Related Information
Arria 10 Transceiver Register Map
6-58
Unsupported Features
UG-01143
2015.05.11
Altera Corporation
Reconfiguration Interface and Dynamic Reconfiguration
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