User guide

Address Type Attribute Name Description
0x321[7:0] R ODI Accelerator Error
Counters[7:0]
Only available when you turn on Enable odi
acceleration logic in the Dynamic Reconfigu‐
ration tab of the Native PHY IP.
ODI Accelerator Error Counters[42:0]
reports the total number of error bits received
when you enable or reset the ODI accelerator
error counter.
0x322[7:0] R ODI Accelerator Error
Counters[15:8]
0x323[7:0] R ODI Accelerator Error
Counters[23:16]
0x324[7:0] R ODI Accelerator Error
Counters[31:24]
0x325[7:0] R ODI Accelerator Error
Counters[39:32]
0x326[2:0] R ODI Accelerator Error
Counters[42:40]
0x32D[7:0] R ODI Accelerator Bit
Counters[7:0]
Only available when you turn on Enable odi
acceleration logic in the Dynamic Reconfigu‐
ration page of the Native PHY IP.
ODI Accelerator Bit Counters[42:0] reports
the total number of bits received since you
enabled or reset the ODI accelerator error
counter.
0x32E[7:0] R ODI Accelerator Bit
Counters[15:8]
0x32F[7:0] R ODI Accelerator Bit
Counters[23:16]
0x330[7:0] R ODI Accelerator Bit
Counters[31:24]
0x331[7:0] R ODI Accelerator Bit
Counters[39:32]
0x332[2:0] R ODI Accelerator Bit
Counters[42:40]
Using Data Pattern Generators and Checkers
The Arria 10 transceivers contain hardened data generators and checkers to provide a simple and easy
way to verify and characterize high speed links. Hardening the data generators and verifiers saves FPGA
core logic resources. The pattern generator block supports the following patterns:
Pseudo Random Binary Sequence (PRBS)
Square wave
Pseudo Random Pattern (PRP)
The pattern generators and checkers are supported only for non-bonded channels.
Using PRBS and Square Wave Data Pattern Generator and Checker
Use the Arria 10 PRBS generator and checker to simulate traffic and easily characterize high-speed links
without fully implementing any upper protocol stack layer. The PRBS generator generates a self-aligning
pattern and covers a known number of unique sequences. Because the PRBS pattern is generated by a
UG-01143
2015.05.11
Using Data Pattern Generators and Checkers
6-47
Reconfiguration Interface and Dynamic Reconfiguration
Altera Corporation
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