User guide

ODI acceleration logic is available whether ADME is instantiated separately or as part of the Native PHY
IP. To enable ODI acceleration logic with the Native PHY IP:
1. Enable dynamic reconfiguration
2. Enable the shared reconfiguration interface
3. Enable ODI acceleration logic
To control the acceleration logic, three registers are available:
• Enable—starts and stops the acceleration logic.
• Reset—resets the counters.
• Snapshot—stores the current values of the counters into storage registers. This ensures that all reads
are from the same counter value. Because multiple reads are required to read out the values of the bits
and errors, without the snapshot register the value of the bits might be read out before an accumula‐
tion occurred, followed by a readout of the errors after the accumulation has occurred. This would
skew the results. The snapshot register ensures that the counters can run freely in the background
while reading a static value.
Table 6-30: ODI Acceleration Logic Registers
Address Type Attribute Name Description
0x320[0] RW ODI Accelerator Counter
Enable
Only available when you turn on Enable odi
acceleration logic in the Dynamic Reconfigu‐
ration tab of the Native PHY IP.
1'b0: the ODI accelerator counters stop
accumulating.
1'b1: the ODI accelerator counters accumulate
bits and errors.
0x320[1] RW ODI Accelerator Counter
Reset
Only available when you turn on Enable odi
acceleration logic in the Dynamic Reconfigu‐
ration tab of the Native PHY IP.
1'b0: ODI accelerator counters are reset to 0.
1'b1: ODI accelerator counters are in normal
status.
0x320[2] RW ODI Accelerator Counter
Snapshot
Only available when you turn on Enable odi
acceleration logic in the Dynamic Reconfigu‐
ration tab of the Native PHY IP.
1'b0: ODI Accelerator Error Counters and
ODI Accelerator Bit Counters values are
locked and ready to be read.
1'b1: Copy internal counter values into ODI
Accelerator Error Counters and ODI
Accelerator Bit Counters.
6-46
ODI Acceleration Logic
UG-01143
2015.05.11
Altera Corporation
Reconfiguration Interface and Dynamic Reconfiguration
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