User guide
Address Type Name Description
0x304[7:0] RO Accumulated error count
[31:24]
Accumulated error count [31:24]
0x305[7:0] RO Accumulated error count
[39:32]
Accumulated error count [39:32]
0x306[7:0] RO Accumulated error count
[47:40]
Accumulated error count [47:40]
0x307[1:0] RO Accumulated error count
[49:48]
Accumulated error count [49:48]
0x30D[7:0] RO Accumulated bit pass through
count[7:0]
Accumulated bit pass through
count[7:0]
0x30E[7:0] RO Accumulated bit pass through
count[15:8]
Accumulated bit pass through
count[15:8]
0x30F[7:0] RO Accumulated bit pass through
count[23:16]
Accumulated bit pass through
count[23:16]
0x310[7:0] RO Accumulated bit pass through
count[31:24]
Accumulated bit pass through
count[31:24]
0x311[7:0] RO Accumulated bit pass through
count[39:32]
Accumulated bit pass through
count[39:32]
0x312[7:0] RO Accumulated bit pass through
count[47:40]
Accumulated bit pass through
count[47:40]
0x313[1:0] RO Accumulated bit pass through
count[49:48]
Accumulated bit pass through
count[49:48]
Note: Altera recommends that you disable the byte serializer and deserializer blocks when using the soft
PRBS accumulators. When the byte serializer and deserializer blocks are enabled, the number of
bits counted are halved because the clock is running at half the rate.
ODI Acceleration Logic
The accumulated error count from the ODI can be accessed in two ways: System Console or the
reconfiguration interface.
ODI acceleration logic accelerates the Avalon-MM interface and acts as a buffer when the System Console
is being used to read the accumulated errors or bits. This is helpful because the System Console is limited
by the speed of the JTAG clock while reading the accumulated errors or bits. When the reconfiguration
interface is used to access the errors, acceleration logic is not necessary, because reconfig_clk can run up
to 100 MHz, which is sufficient to capture the accumulated errors or bits without any discrepancy.
The acceleration logic is a counter, which accumulates bits and errors and sequences the accumulation of
errors with that of starting the ODI. There are three control bits that allow you to start and stop
accumulating errors, reset the counters, and create snapshots. When you start the operation, Avalon-MM
requests are sent to control the IP, sequence the read and write requests to the adaptation block, and read
out the accumulated bits and errors.
UG-01143
2015.05.11
ODI Acceleration Logic
6-45
Reconfiguration Interface and Dynamic Reconfiguration
Altera Corporation
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