User guide

Reconfiguration Interface and Dynamic
Reconfiguration
6
2015.05.11
UG-01143
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This chapter explains the purpose and the use of the Arria 10 reconfiguration interface that is part of the
Transceiver Native PHY IP core and the Transceiver PLL IP core.
Dynamic reconfiguration is the process of dynamically modifying transceiver channels and PLLs to meet
changing requirements during device operation. Arria 10 transceiver channels and PLLs are fully
customizable, allowing a system to adapt to its operating environment. You can customize channels and
PLLs by dynamically triggering reconfiguration during device operation or following power-up. Dynamic
reconfiguration is available for Arria 10 Transceiver Native PHY, fPLL, ATX PLL, and CMU PLL IP cores.
Use the reconfiguration interface to dynamically change the transceiver channel or PLL settings for the
following applications:
• Fine tuning signal integrity by adjusting TX and RX analog settings
• Enabling or disabling transceiver channel blocks, such as the PRBS generator and the checker
• Changing data rates to perform auto negotiation in CPRI, SATA, or SAS applications
• Changing data rates in Ethernet (1G/10G) applications by switching between standard and enhanced
PCS datapaths
• Changing TX PLL settings for multi-data rate support protocols such as CPRI
• Changing RX CDR settings from one data rate to another
• Switching between multiple TX PLLs for multi-data rate support
The Native PHY and Transmit PLL IP cores provide the following features that allow dynamic reconfigu‐
ration:
• Reconfiguration interface
• Configuration files
• Multiple reconfiguration profiles (Native PHY only)
• Embedded reconfiguration streamer (Native PHY only)
• Altera Debug Master Endpoint (ADME)
• Optional reconfiguration logic
• On-Die Instrumentation (ODI)
Each transceiver channel and PLL contains an Avalon Memory-Mapped (Avalon-MM) reconfiguration
interface. The reconfiguration interface provides direct access to the programmable space of each channel
and PLL. Because each channel and PLL has its own dedicated Avalon-MM interface, you can
dynamically modify channels either concurrently or sequentially, depending on how the Avalon-MM
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