User guide

PCS-PMA
Interface
Width
Supported Word
Aligner Modes
Supported
Word
Aligner
Pattern
Lengths
rx_std_wa_
patternalign
behavior
rx_syncstatus
behavior
rx_patterndetect
behavior
Manual 7, 10, 20, 40 Word alignment
is controlled by
rising edge of
rx_std_wa_
patternalign.
Stays high after
the word aligner
aligns to the
word alignment
pattern. Goes
low on receiving
a rising edge on
rx_std_wa_
patternalign
until a new word
alignment
pattern is
received.
Asserted high for one
parallel clock cycle
when the word
alignment pattern
appears in the current
word boundary.
Deterministic
latency (CPRI mode
only)
10 Word alignment
is controlled by
rx_std_wa_
patternalign
(edge-sensitive
to this signal)
and the
deterministic
latency state
machine which
controls the
PMA to achieve
deterministic
latency on the
RX path for
CPRI and
OBSAI
applications.
— —
Synchronous State
Machine
7, 10, 20 FPGA fabric-
driven rx_std_
wa_
patternalign
signal has no
effect on word
alignment.
Stays high as
long as the
synchronization
conditions are
satisfied.
Asserted high for one
parallel clock cycle
when the word
alignment pattern
appears in the current
word boundary.
Word Aligner RX Bit Reversal Feature
The RX bit reversal feature reverses the order of the data received from the PMA. It is performed at the
output of the Word Aligner and is available even when the Word Aligner is disabled. If the data received
5-48
Word Aligner RX Bit Reversal Feature
UG-01143
2015.05.11
Altera Corporation
Arria 10 Transceiver PHY Architecture
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