User guide

PCS-PMA
Interface
Width
Supported Word
Aligner Modes
Supported
Word
Aligner
Pattern
Lengths
rx_std_wa_
patternalign
behavior
rx_syncstatus
behavior
rx_patterndetect
behavior
BITSLIP signal
toggles.
Manual 7, 10 Word alignment
is controlled by
rx_std_wa_
patternalign
and is level-
sensitive to this
signal.
Asserted high
for one parallel
clock cycle when
the word aligner
aligns to a new
boundary.
Asserted high for one
parallel clock cycle
when the word
alignment pattern
appears in the current
word boundary.
Deterministic
latency (CPRI mode
only)
10 Word alignment
is controlled by
rx_std_wa_
patternalign
(edge-sensitive
to this signal)
and the state
machine works
in conjunction
with PMA to
achieve
deterministic
latency on the
RX path for
CPRI and
OBSAI
applications.
— —
Synchronous State
Machine
7, 10 rx_std_wa_
patternalign
has no effect on
word alignment.
Stays high as
long as the
synchronization
conditions are
satisfied.
Asserted high for one
parallel clock cycle
when the word
alignment pattern
appears in the current
word boundary.
16
Bit slip 16 rx_std_wa_
patternalign
has no effect on
word alignment.
The double
width word
aligner updates
the word
boundary, only
N/A N/A
5-46
Word Aligner Pattern Length for Various Word Aligner Modes
UG-01143
2015.05.11
Altera Corporation
Arria 10 Transceiver PHY Architecture
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