User guide

Interlaken Mode
In Interlaken mode, the TX FIFO operates as an elastic buffer. In this mode, there are additional signals to
control the data flow into the FIFO. Therefore, the FIFO write clock frequency does not have to be the
same as the read clock frequency. You control the writing to the TX FIFO with tx_enh_data_valid by
monitoring the FIFO flags. The goal is to prevent the FIFO from becoming full or empty. On the read
side, read enable is controlled by the Interlaken frame generator.
Basic Mode
In Basic mode, the TX FIFO operates as an elastic buffer, where you control the FIFO
tx_enh_data_valid based on FIFO flags. The FIFO read enable is controlled by gearbox data valid,
which is a function of gearbox input and output data width.
Interlaken Frame Generator
The Interlaken frame generator block takes the data from the TX FIFO and encapsulates the payload and
burst/idle control words from the FPGA fabric with the framing layer’s control words (synchronization
word, scrambler state word, skip word, and diagnostic word) to form a metaframe. The Native PHY IP
Parameter Editor allows you to set the metaframe length from five 8-byte words to a maximum value of
8192 (64Kbyte words).
Program the same value for the metaframe length for the transmitter and receiver.
Figure 5-19: Interlaken Frame Generator
The Interlaken frame generator implements the Interlaken protocol.
Interlaken
Frame
Generator
Synchronization
Scrambler
State Word
Skip Word
Data
Sync Header
Inversion Bit (Place Holder for Bit Inversion Information)
Payload
66 65 64
64-Bit Data
1-Bit Control
66-Bit Blocks
63 66 660 0 Di0
Used for Clock Compensation in a Repeater
Used to Synchronize the Scrambler
Used to Align the Lanes of the Bundle
Provides Per
Lane Error Check
and Optional Status
Message
From TX FIFO
To Interlaken
CRC-32 Generator
Interlaken CRC-32 Generator
The Interlaken CRC-32 generator block receives data from the Interlaken frame generator and calculates
the cyclic redundancy check (CRC) code for each block of data. This CRC code value is stored in the
CRC32 field of the diagnostic word. CRC-32 provides a diagnostic tool for each lane. This helps to trace
the errors on the interface back to an individual lane.
UG-01143
2015.05.11
Interlaken Mode
5-21
Arria 10 Transceiver PHY Architecture
Altera Corporation
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