User guide

Figure 5-15: Serial Loopback Path
The serial loopback path sets the CDR to recover the data from serializer while data from receiver serial
input pin is ignored by CDR. The transmitter buffer sends data normally.
Transmitter
Buffer
Serial
Data
Transmitter PMA
FPGA
Fabric
Receiver
PCS
Deserializer
Parallel
Data
Parallel
Data
Serial
Data
Serial Clock
Receiver PMA
CDR
Serial
Data
Receiver
Buffer
Parallel Clock
Serial
Loopback
Receiver Serial
Differential Input
Data
Transmitter Serial
Differential Output
Data
FPGA
Fabric
Transmitter
PCS
Serializer
Transmitter
PLL
ParallelParallel
DataData
Serial
Clock
Input
Reference
Clock
Clock
Generation
Block
Parallel
Clock
Figure 5-16: Diagnostic Loopback Path/Pre CDR
FPGA
Fabric
Transmitter
PCS
Serializer
Transmitter
Buffer
Transmitter
PLL
Parallel
Data
Parallel
Data
Serial
Data
Serial
Clock
Input
Reference
Clock
Transmitter PMA
Clock
Generation
Block
Parallel
Clock
FPGA
Fabric
Receiver
PCS
Deserializer
Parallel
Data
Parallel
Data
Serial
Data
Receiver PMA
CDR
Serial
Data
Receiver
Buffer
Transmitter Serial
Differential Output
Data
Receiver Serial
Differential Input
Data
Serial Clock
Parallel Clock
Diagnostic
Loopback
UG-01143
2015.05.11
Loopback
5-17
Arria 10 Transceiver PHY Architecture
Altera Corporation
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