User guide
Figure 3-19: PHY IP Core and PLL IP Core Connection for Single Channel x1 Non-Bonded Configuration
Example
Transceiver PLL
Instance (5 GHz)
PLL
Native PHY Instance
(1 CH Non-Bonded 10 Gbps)
TX Channel
To implement this configuration, instantiate a PLL IP core and a PHY IP core and connect them together
as shown in the above figure.
Steps to implement a Single Channel x1 Non-Bonded Configuration
1. Instantiate the PLL IP core (ATX PLL, fPLL, or CMU PLL) you want to use in your design.
• Refer to Instantiating the ATX PLL IP Core on page 3-5 or Instantiating CMU PLL IP Core on
page 3-23 or Instantiating the fPLL IP Core on page 3-15 for detailed steps.
2. Configure the PLL IP core using the IP Parameter Editor.
• For ATX PLL IP core, do not include the Master CGB.
• For fPLL IP core, set the PLL feedback operation mode to direct.
• For CMU PLL IP core, specify the reference clock and the data rate. No special configuration rule is
required.
3. Configure the Native PHY IP core using the IP Parameter Editor .
• Set the Native PHY IP TX Channel bonding mode to Non Bonded .
4. Connect the PLL IP core to the Native PHY IP core. Connect the tx_serial_clk output port of the
PLL to IP to the corresponding tx_serial_clk0 input port of the Native PHY IP. This port represents
the input to the local CGB of the channel. The tx_serial_clk for the PLL represents the high speed
serial clock generated by the PLL.
Implementing Multi-Channel x1 Non-Bonded Configuration
This configuration is an extension of the x1 non-bonded case. In the following example, 10 channels are
connected to two instances of the PLL IP core. Two PLL instances are required because PLLs using the x1
clock network can only span the 6 channels within the same transceiver bank. A second PLL instance is
required to provide the clock to the remaining 4 channels.
Because 10 channels are not bonded and are unrelated, you can use a different PLL type for the second
PLL instance. It is also possible to use more than two PLL IP cores and have different PLLs driving
different channels. If some channels are running at different data rates, then you need different PLLs
driving different channels.
3-50
Implementing Multi-Channel x1 Non-Bonded Configuration
UG-01143
2015.05.11
Altera Corporation
PLLs and Clock Networks
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