User guide

Figure 2-4: Arria 10 Transceiver PLL Types
Related Information
PLLs on page 3-3
Configure the PLL IP Core
Understand the available PLLs, clock networks, and the supported clocking configurations. Configure the
PLL IP to achieve the adequate data rate for your design.
Related Information
• ATX PLL IP Core on page 3-6
UG-01143
2015.05.11
Configure the PLL IP Core
2-7
Implementing Protocols in Arria 10 Transceivers
Altera Corporation
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