User guide

Figure 2-133: TX Bit Slip in 20-bit Mode
tx_parallel_data = 20'hF3CBC. tx_std_bitslipboundarysel = 5'b00111 (bit slip by 7 bits).
tx_std_bitslipboundarysel
tx_parallel_data
rx_parallel_data
00111
f3cbc
e5e1f
TX Polarity Inversion
The positive and negative signals of a serial differential link might accidentally be swapped during board
layout. Solutions such as a board respin or major updates to the PLD logic can be expensive. The
transmitter polarity inversion feature is provided to correct this situation.
Transmitter polarity inversion can be enabled in low latency, basic, and basic rate match modes.
To enable TX polarity inversion, select the Enable tx_polinv port option in Qsys. It can also be
dynamically controlled with dynamic reconfiguration.
This mode adds tx_polinv. If there is more than one channel in the design, tx_polinv is a bus with each
bit corresponding to a channel. As long as tx_polinv is asserted, the TX data transmitted has a reverse
polarity.
TX Bit Reversal
The TX bit reversal feature can be enabled in low latency, basic, and basic rate match mode. The word
aligner is available in any mode. This feature is parameter-based, and creates no additional ports. If there
is more than one channel in the design, all channels have TX bit reversal.
To enable TX bit reversal, select the Enable TX bit reversal option in Qsys. It can also be dynamically
controlled with dynamic reconfiguration.
Figure 2-134: TX Bit Reversal
tx_parallel_data
rx_parallel_data
11111100001110111100
00000... 00111101110000111111
TX Byte Reversal
The TX byte reversal feature can be enabled in low latency, basic, and basic rate match mode. The word
aligner is available in any mode. This feature is parameter-based, and creates no additional ports. If there
is more than one channel in the design, all channels have TX byte reversal.
To enable TX byte reversal, select the Enable TX byte reversal option in Qsys. It can also be dynamically
controlled with dynamic reconfiguration.
Figure 2-135: TX Byte Reversal
tx_parallel_data
rx_parallel_data
11111100001110111100
00000000... 11101111001111110000
UG-01143
2015.05.11
TX Polarity Inversion
2-305
Implementing Protocols in Arria 10 Transceivers
Altera Corporation
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