User guide

Figure 2-113: Manual Mode when the PCS-PMA Interface Width is 20 Bits
tx_parallel_data = 20'hFC3BC and the word aligner pattern = 0x3BC
rx_std_wa_patternalign
tx_parallel_data
rx_parallel_data
rx_patterndetect
rx_syncstatus
rx_std_wa_patternalign
tx_parallel_data
rx_parallel_data
rx_patterndetect
rx_syncstatus
fc3bc
0000
00 01
1100 11 11
fc3bc
fc3bc
00
01
11
fc3bc
11
Word Aligner Synchronous State Machine Mode
To use this mode:
Select the Enable TX 8B/10B encoder option.
Select the Enable RX 8B/10B decoder option.
The 8B/10B encoder and decoder add the following additional ports:
tx_datak
rx_datak
rx_errdetect
rx_disperr
rx_runningdisp
1. Set the RX word aligner mode to synchronous state machine.
2. Set the RX word aligner pattern length option according to the PCS-PMA interface width.
3. Enter a hexadecimal value in the RX word aligner pattern (hex) field.
The RX word aligner pattern is the 8B/10B encoded version of the data pattern. You can also specify the
number of word alignment patterns to achieve synchronization, the number of invalid data words to lose
synchronization, and the number of valid data words to decrement error count. This mode adds two
additional ports: rx_patterndetect and rx_syncstatus.
Note:
rx_patterndetect is asserted whenever there is a pattern match.
rx_syncstatus is asserted after the word aligner achieves synchronization.
rx_std_wa_patternalign is asserted to re-align and re-synchronize.
If there is more than one channel in the design, tx_datak, rx_datak, rx_errdetect,
rx_disperr, rx_runningdisp, rx_patterndetect, and rx_syncstatus become buses in
which each bit corresponds to one channel.
UG-01143
2015.05.11
Word Aligner Synchronous State Machine Mode
2-295
Implementing Protocols in Arria 10 Transceivers
Altera Corporation
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