User guide

CPRI
The common public radio interface (CPRI) is a high-speed serial interface developed for wireless network
radio equipment controller (REC) to uplink and downlink data from available remote radio equipment
(RE).
The CPRI protocol defines the interface of radio base stations between the REC and the RE. The physical
layer supports both the electrical interfaces (for example, traditional radio base stations) and the optical
interface (for example, radio base stations with a remote radio head). The scope of the CPRI specification
is restricted to the link interface only, which is a point-to-point interface. The link has all the features
necessary to enable a simple and robust usage of any given REC and RE network topology, including a
direct interconnection of multiport REs.
Transceiver Channel Datapath and Clocking for CPRI
Figure 2-95: Transceiver Channel Datapath and Clocking for CPRI
RX
FIFO
Byte
Deserializer
8B/10B Decoder
Rate Match FIFO
Receiver PMA
Word Aligner
Deserializer
CDR
Receiver Standard PCS
Transmitter Standard PCS
Transmitter PMA
Serializer
tx_serial_data
rx_serial_data
FPGA
Fabric
TX
FIFO
Byte Serializer
8B/10B Encoder
PRBS
Generator
TX Bit Slip
/2, /4
/2, /4
Parallel Clock
Serial Clock
Parallel and Serial Clock
Parallel and Serial Clock
Clock Divider
rx_pma_div_clkout
Serial Clock
Clock Generation Block (CGB)
ATX PLL
CMU PLL
fPLL
tx_coreclkin
rx_coreclkin
rx_clkout or
tx_clkout
Parallel Clock
(Recovered)
Parallel Clock
(From Clock
Divider)
tx_clkout
tx_clkout
tx_clkout
rx_clkout
PRBS
Verifier
tx_pma_div_clkout
40
40
245 MHz
245 MHz
32
32
245 MHz
245 MHz
2-268
CPRI
UG-01143
2015.05.11
Altera Corporation
Implementing Protocols in Arria 10 Transceivers
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