User guide

Signal Name Gen1 (TX Byte
Serializer and
RX Byte
Deserializer
disabled)
Gen1 (TX Byte
Serializer and RX
Byte Deserializer
in X2 mode), Gen2
(TX Byte Serializer
and RX Byte
Deserializer in X2
mode)
Gen3
tx_datak tx_
parallel_
data[8]
tx_parallel_
data[30,8]
tx_parallel_data[41,30,19,8]
pipe_tx_compliance tx_
parallel_
data[9]
tx_parallel_
data[31,9]
tx_parallel_data[42,31,20,9]
pipe_tx_elecidle tx_
parallel_
data[10]
tx_parallel_
data[32,10]
tx_parallel_data[43,32,21,10]
pipe_tx_detectrx_
loopbacK
tx_
parallel_
data[46]
tx_parallel_
data[46]
tx_parallel_data[46]
pipe_powerdown tx_
parallel_
data[48:47]
tx_parallel_
data[48:47]
tx_parallel_data[48:47]
pipe_tx_margin tx_
parallel_
data[51:49]
tx_parallel_
data[51:49]
tx_parallel_data[51:49]
pipe_tx_swing tx_
parallel_
data[53]
tx_parallel_
data[53]
tx_parallel_data[53]
rx_parallel_data rx_
parallel_
data[7:0]
rx_parallel_
data[39:32,7:0
]
rx_parallel_
data[55:48,39:32,23:16,7:0]
rx_datak rx_
parallel_
data[8]
rx_parallel_
data[40,8]
rx_parallel_data[56,40,24,8]
rx_syncstatus rx_
parallel_
data[10]
rx_parallel_
data[42,10]
rx_parallel_data[58,42,26,10]
pipe_phy_status rx_
parallel_
data[65]
rx_parallel_
data[65]
rx_parallel_data[65]
pipe_rx_valid rx_
parallel_
data[66]
rx_parallel_
data[66]
rx_parallel_data[66]
2-252
Native PHY IP Parameter Settings for PIPE
UG-01143
2015.05.11
Altera Corporation
Implementing Protocols in Arria 10 Transceivers
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