User guide

Related Information
• Arria 10 Transceiver PHY Design Examples
• 10-Gbps Ethernet MAC MegaCore Function User Guide.
For more information about latency in the MAC as part of the Precision Time Protocol implementa‐
tion.
Simulation Support
The 1G/10GbE and 10GBASE-KR PHY IP core supports the following Altera-supported simulators for
this Quartus II software release:
• ModelSim Verilog
• ModelSim VHDL
• VCS Verilog
• VCS VHDL
• NCSIM Verilog
• NCSIM VHDL simulation
When you generate a 1G/10GbE or 10GBASE-KR PHY IP core, the Quartus II software optionally
generates an IP functional simulation model.
1-Gigabit/10-Gigabit Ethernet (GbE) PHY IP Core
The Ethernet standard comprises many different PHY standards with variations in signal transmission
medium and data rates.
The 1G/10Gbps Ethernet PHY IP core targets the reconfigurable 10-Mbps/100-Mbps/1-Gbps/10-Gbps
data rates with one core dynamically. This Ethernet PHY interfaces to 1G/10GbE dual speed SFP+
pluggable modules, 10MB–10GbE 10GBASE-T, and 10MB/100MB/1000MB 1000BASE-T copper external
PHY devices to drive CAT-6/7 shielded twisted pair cables, and chip-to-chip interfaces.
The 1G/10 Gbps Ethernet PHY (1G/10GbE ) MegaCore
®
function allows you to support the following
features of Ethernet standards:
• 1 GbE protocol as defined in Clause 36 of the IEEE 802.3-2008 Standard
• GMII to connect the PHY with a media access control (MAC) as defined in Clause 35 of the IEEE
802.3-2008 Standard
• Gigabit Ethernet Auto-negotiation as defined in Clause 37 of the IEEE 802.3-2008 Standard
• 10GBASE-R Ethernet protocol as defined in Clause 49 of the IEEE 802.3-2008 Standard
• Single data rate (64 data bits and 8 control bits) XGMII to provide simple and inexpensive intercon‐
nection between the MAC and the PHY as defined in Clause 46 of the IEEE 802.3-2008 Standard
• SGMII 10-Mbps/100-Mbps/1-Gbps data rate where 10-Mbps/100-Mbps MII to connect physical
media with the MAC as defined in Clause 22 of the IEEE 802.3-2008 Standard
• Forward Error correction(FEC) as defined in Clause 74 of the IEEE 802.3-2008 Standard
• Precision time protocol (PTP) as defined in the IEEE 1588 Standard
The 1G/10Gbps Ethernet PHY IP Core allows you to implement the 1GbE protocol using the Standard
PCS and to implement the 10GbE protocol using Enhanced PCS and PMA. You can switch dynamically
between the 1G and 10G data rates using dynamic reconfiguration to reprogram the core. Or, you can use
the speed detection option to automatically switch data rates based on received data.
UG-01143
2015.05.11
Simulation Support
2-163
Implementing Protocols in Arria 10 Transceivers
Altera Corporation
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