User guide
Signal Name Direction Clock Domain Description
xgmii_rx_clk
Input
Clock signal
Clock for SDR XGMII RX interface to the MAC. This
clock can be connected to the tx_div_clkout ;
however, Altera recommends that you connect it to a
PLL for use with the Triple Speed Ethernet MegaCore
function. The frequency is 125 MHz for 1G and
156.25 MHz for 10G. This clock is driven from the
MAC.
The frequencies are the same whether or not you
enable FEC.
XGMII Mapping to Standard SDR XGMII Data
Table 2-107: TX XGMII Mapping to Standard SDR XGMII Interface
The 72-bit TX XGMII data bus format is different than the standard SDR XGMII interface. This table shows the
mapping of this non-standard format to the standard SDR XGMII interface.
Signal Name SDR XGMII Signal Name Description
xgmii_tx_dc[7:0] xgmii_sdr_data[7:0] Lane 0 data
xgmii_tx_dc[8] xgmii_sdr_ctrl[0] Lane 0 control
xgmii_tx_dc[16:9] xgmii_sdr_data[15:8] Lane 1 data
xgmii_tx_dc[17] xgmii_sdr_ctrl[1] Lane 1 control
xgmii_tx_dc[25:18] xgmii_sdr_data[23:16] Lane 2 data
xgmii_tx_dc[26] xgmii_sdr_ctrl[2] Lane 2 control
xgmii_tx_dc[34:27] xgmii_sdr_data[31:24] Lane 3 data
xgmii_tx_dc[35] xgmii_sdr_ctrl[3] Lane 3 control
xgmii_tx_dc[43:36] xgmii_sdr_data[39:32] Lane 4 data
xgmii_tx_dc[44] xgmii_sdr_ctrl[4] Lane 4 control
xgmii_tx_dc[52:45] xgmii_sdr_data[47:40] Lane 5 data
xgmii_tx_dc[53] xgmii_sdr_ctrl[5] Lane 5 control
xgmii_tx_dc[61:54] xgmii_sdr_data[55:48] Lane 6 data
xgmii_tx_dc[62] xgmii_sdr_ctrl[6] Lane 6 control
xgmii_tx_dc[70:63] xgmii_sdr_data[63:56] Lane 7 data
xgmii_tx_dc[71] xgmii_sdr_ctrl[7] Lane 7 control
Table 2-108: RX XGMII Mapping to Standard SDR XGMII Interface
The 72-bit RX XGMII data bus format is different from the standard SDR XGMII interface. This table shows the
mapping of this non-standard format to the standard SDR XGMII interface.
Signal Name XGMII Signal Name Description
xgmii_rx_dc[7:0] xgmii_sdr_data[7:0] Lane 0 data
2-136
XGMII Mapping to Standard SDR XGMII Data
UG-01143
2015.05.11
Altera Corporation
Implementing Protocols in Arria 10 Transceivers
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