User guide

Note: Refer to Arria 10 GT Channel Usage on page 2-313 for details on Arria 10 GT channel usage
restrictions.
Figure 1-9: Arria 10 GT Devices with 72 Transceiver Channels and Four PCIe Hard IP Blocks
Transceiver
Bank
Transceiver
Bank
Transceiver
Bank
Transceiver
Bank
Transceiver
Bank
Transceiver
Bank
Transceiver
Bank
Transceiver
Bank
Transceiver
Bank
Transceiver
Bank
Transceiver
Bank
Transceiver
Bank
Transceiver
Bank
Transceiver
Bank
Transceiver
Bank
Transceiver
Bank
Transceiver
Bank
Transceiver
Bank
Transceiver
Bank
GT 115 SF45
GT 090 SF45
GT Channels
Capable of Short
Reach 28.3 Gbps
GXBL1C
GXBL1D
GXBL1E
GXBL1F
GXBL1G
GXBL1H
GXBR4C
GXBR4D
GXBR4E
GXBR4F
GXBR4G
GXBR4H
Notes:
(1) Nomenclature of left column bottom transceiver banks always end with “C”.
(2) Nomenclature of right column bottom transceiver banks may end with “C”, “D”, or “E”.
(1) (2)
GX or Restricted
GT or GX
GT or GX
GX or Restricted
GT or GX
GT or GX
CH5
CH4
CH3
CH2
CH1
CH0
PCIe
Gen1 - Gen3
Hard IP
PCIe
Gen1 - Gen3
Hard IP
PCIe
Gen1 - Gen3
Hard IP
PCIe
Gen1 - Gen3
(with CvP)
Hard IP
Legend:
GX transceiver channels (channel 2 and 5) with usage restrictions.
GT transceiver channels (channel 0, 1, 3, and 4).
PCIe Gen1 - Gen3 Hard IP blocks with Configuration via Protocol (CvP) capabilities.
PCIe Gen1 - Gen3 Hard IP blocks without Configuration via Protocol (CvP) capabilities.
GX transceiver channels without usage restrictions.
1-10
Arria 10 GT Device Transceiver Layout
UG-01143
2015.05.11
Altera Corporation
Arria 10 Transceiver PHY Overview
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