User guide

Related Information
8B/10B Decoder on page 5-50
Rate Match FIFO for GbE
The rate match FIFO compensates frequency Part-Per-Million (ppm) differences between the upstream
transmitter and the local receiver reference clock up to 125 MHz ± 100 ppm difference.
Note: 200 ppm total is only true if calculated as (125 MHz + 100 ppm) - (125 MHz - 100 ppm) = 200
ppm. By contrast, (125 MHz + 0 ppm) - (125 MHz - 200 ppm) is out of specification.
The GbE protocol requires the transmitter to send idle ordered sets /I1/ (/K28.5/D5.6/) and /I2/ (/K28.5/
D16.2/) during inter-packet gaps (IPG) adhering to the rules listed in the IEEE 802.3-2008 specification.
The rate match operation begins after the synchronization state machine in the word aligner indicates
synchronization is acquired by driving the rx_syncstatus signal high. The rate matcher deletes or inserts
both symbols /K28.5/ and /D16.2/ of the /I2/ ordered sets as a pair in the operation to prevent the rate
match FIFO from overflowing or underflowing. The rate match operation can insert or delete as
many /I2/ ordered sets as necessary.
The following figure shows a rate match deletion operation example where three symbols must be deleted.
Because the rate match FIFO can only delete /I2/ ordered sets, it deletes two /I2/ ordered sets (four
symbols deleted).
Figure 2-32: Rate Match FIFO Deletion
Dx .y K 28 .5
datain
K 28 .5 D 16 .2
K 28 .5 D 16 .2 Dx .y
D 16 .2
First /I2/ Ordered S et /I2/ Ordered S etS econd Third /I2/ Ordered Set
Dx .y Dx .yK 28 .5dataout D 16 .2
/I2/ SKIP Symbol Deleted
The following figure shows an example of rate match FIFO insertion in the case where one symbol must
be inserted. Because the rate match FIFO can only insert /I2/ ordered sets, it inserts one /I2/ ordered set
(two symbols inserted).
Figure 2-33: Rate Match FIFO Insertion
Dx .y K 28 .5
datain
K 28 .5
K 28 .5
D 16 .2
K 28 .5 D 16 .2 Dx .y
D 16 .2
First /I2/ Ordered S et /I2/ Ordered S etS econd
Dx .y K28 .5dataout D 16 .2 D 16 .2
/I2/ SKIP Symbol Inserted
rx_std_rmfifo_full and rx_std_rmfifo_empty are forwarded to the FPGA fabric to indicate rate
match FIFO full and empty conditions.
UG-01143
2015.05.11
Rate Match FIFO for GbE
2-103
Implementing Protocols in Arria 10 Transceivers
Altera Corporation
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