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7. Implement a TX soft bonding logic and an RX multi-lane alignment deskew state machine using fabric
logic resources for multi-lane Interlaken implementation.
8. Connect the Native PHY IP to the PLL IP and the reset controller.
Figure 2-23: Connection Guidelines for an Interlaken PHY Design
This figure shows the connection of all these blocks in the Interlaken PHY design example available on
the Altera Wiki website.
For the blue blocks, Altera provides an IP core. The gray blocks use the TX soft bonding logic that is
included in the design example. The white blocks are your test logic or MAC layer logic.
Reset
Controller
PLL IP
Pattern
Generator
Pattern
Verifier
TX Soft
Bonding
RX
Deskew
Arria 10
Transceiver
Native PHY
PLL and CGB Reset
TX/RX Analog/Digital Reset
TX FIFO Status
TX Data Stream
RX Data Stream
TX FIFO Control
Control and Status
Control and Status
RX FIFO Status
RX FIFO Control
TX Clocks
9. Simulate your design to verify its functionality.
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How to Implement Interlaken in Arria 10 Transceivers
UG-01143
2015.05.11
Altera Corporation
Implementing Protocols in Arria 10 Transceivers
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