User guide
5–10 Chapter 5: Interlaken PHY IP Core
Interfaces
Altera Transceiver PHY IP Core March 2012 Altera Corporation
User Guide
Avalon-ST RX Interface
Table 5–7 describes the signals in the Avalon-ST RX interface.
tx_clkout
Output
Output clock from the TX PCS. The frequency of this clock equals the
Lane rate divided by 40, which is the PMA serialization factor.
tx_user_clkout
Output
Master channel
tx_clkout
is available when you do not create the
optional
tx_coreclkin
.
pll_locked
Output
In multilane Interlaken designs, this signal is the bitwise
AND
of the
individual lane
pll_locked
signals.
tx_sync_done
Output
When asserted, indicates that all
tx_parallel_data
lanes are
synchronized and ready for service. The Interlaken MAC must wait for
this signal and
tx_ready
before initiating data transfer on any lane.
Table 5–6. Avalon-ST TX Signals
Signal Name Direction Description
Table 5–7. Avalon-ST RX Signals (Part 1 of 3)
Signal Name Direction Description
rx_parallel_data<n>[63:0]
Source Avalon-ST data bus driven from the RX PCS to the FPGA fabric.
rx_parallel_data<n>[64]
Source
When asserted, indicates that
rx_parallel_data<n>[63:0]
is
valid. When deasserted, indicates the
rx_parallel_data<n>[63:0]
is invalid.
The Interlaken PCS implements a gearbox between the PMA and PCS
interface. The
rx_parallel_data<n>[64]
port is deasserted
whenever the gearbox is in the invalid region. The Interlaken MAC
should gate
rx_dataout_bp<n>
usage based on this signal.
rx_parallel_data<n>[65]
Source
Indicates whether
rx_paralleldata<n>[63:0]
represents control
or data. When deasserted,
rx_paralleldata<n>[63:0]
is a data
word. When asserted,
rx_paralleldata<n>[63:0]
is a control
word.
The value of header synchronization bits[65:64] of the Interlaken
word identify whether bits[63:0] are Framing Layer
Control/Burst/IDLE Word or a data word. The value 2’b10 indicating a
Framing Layer Control/Burst/IDLE Word is gray encoded to the value
1’b1 and
rx_parallel_data<n>[65]
is asserted by the Interlaken
Receive PCS. The value 2’b01 indicating data word is gray encoded
to the value 1’b0 and
rx_parallel_data<n>[65]
is deasserted by
the Interlaken Receive PCS. The Framing Layer Control Words are
not discarded and are sent to the Interlaken MAC for multi-lane
alignment and deskew on the lanes.