User guide
Chapter 4: XAUI PHY IP Core 4–3
Performance and Resource Utilization
March 2012 Altera Corporation Altera Transceiver PHY IP Core
User Guide
Performance and Resource Utilization
Table 4–3 shows the typical expected device resource utilization for different
configurations using the current version of the Quartus II software targeting a
Stratix IV GX (EP4SG230KF40C2ES) device.
Parameter Settings
To configure the XAUI IP core in the parameter editor, click Installed Plug-Ins >
Interfaces >Ethernet> XAUI PHY v11.1.
This section describes the XAUI PHY IP core parameters, which you can set using the
parameter editor. Table 4–4 lists the settings available on General Options tab.
Table 4–3. XAUI PHY Performance and Resource Utilization—Stratix IV GX Device
Implementation
Number of 3.125
Gbps Channels
Worst-Case
Frequency
Combinational
ALUTs
Dedicated
Registers
Memory Bits
Soft XAUI 4 183.18 MHz 4500 3200 5100
Hard XAUI 4 400 MHz 2000 1300 0
Table 4–4. General Options (Part 1 of 2)
Name Value Description
Device family
Arria II GX
Cyclone IV GX
Stratix IV
Stratix V
The target device family.
Starting channel number 0–124
The physical starting channel number in the Altera device for channel
0 of this XAUI PHY. In Arria II GX, Cyclone IV GX, HardCopy IV and
Stratix IV devices, this starting channel number must be 0 or a
multiple of 4. There are no numbering restrictions for Stratix V
devices. Assignment of the starting channel number is required for
serial transceiver dynamic reconfiguration.
XAUI interface type
Hard XAUI
Soft XAUI
DDR XAUI
The following 3 interface types are available:
■ Hard XAUI–Implements the PCS and PMA in hard logic. Available
for Arria II, Cyclone IV, HardCopy IV, and Stratix IV devices.
■ Soft XAUI–Implements the PCS in soft logic and the PMA in hard
logic. Available for HardCopy IV, Stratix IV, and Stratix V devices.
■ DDR XAUI–Implements the PCS in soft logic and the PMA in hard
logic. Both the application and serial interfaces run at twice the
frequency of the Soft XAUI options. Available for HardCopy IV
Stratix IV devices.
All interface types include 4 channels.
PLL type
CMU
ATX
You can select either the CMU or ATX PLL. The CMU PLL has a larger
frequency range than the ATX PLL. The ATX PLL is designed to
improve jitter performance and achieves lower channel-to-channel
skew; however, it supports a narrower range of data rates and
reference clock frequencies. Another advantage of the ATX PLL is
that it does not use a transceiver channel, while the CMU PLL does.
This parameter is available for Stratix IV soft and DDR XAUI, and
Stratix V devices.