User guide

9–6 Chapter 9: Deterministic Latency PHY IP Core
Parameter Settings
Altera Transceiver PHY IP Core March 2012 Altera Corporation
User Guide
Parameter Settings
To configure the Deterministic Latency PHY IP core in the parameter editor, click
Installed Plug-Ins > Interfaces > Transceiver PHY > Deterministic Latency PHY
v11.1. You can use the tabs on the parameter editor to select the options required for
the protocol.
The following sections describe all of the options on the tabs of the parameter editor.
General Options
The General Options tab allows you to set the basic parameters of your transceiver
PHY. Table 9–6 lists the settings available on the General Options tab.
Table 9–6. General Options (Part 1 of 2)
Name Value Description
Device family
Arria V
Stratix V
Specifies the device family. Arria V and Stratix V are available.
Mode of operation
Duplex
TX
RX
You can select to transmit data, receive data, or both.
Number of lanes 1–32 The total number of lanes in each direction.
FPGA fabric transceiver
interface width
8
16
32
Specifies the word size between the FPGA fabric and PCS. Refer to
“Sample Channel WIdth Options for Supported Serial Data Rates” on
page 9–7 for the data rates supported at each word size.
PCS-PMA interface width
10
20
Specifies the datapath width between the transceiver PCS and PMA.
A deserializer in the PMA receives serial input data from the RX
buffer using the high-speed recovered clock and deserializes it using
the low-speed parallel recovered clock.
PLL type
CMU
ATX
Specifies the PLL type. The CMU PLL has a larger frequency range
than the ATX PLL. The ATX PLL is designed to improve jitter
performance and achieves lower channel-to-channel skew; however,
it supports a narrower range of data rates and reference clock
frequencies. Another advantage of the ATX PLL is that it does not use
a transceiver channel, while the CMU PLL does. Because the CMU
PLL is more versatile, it is specified as the default setting.
Data rate
611 Mbps –
6553.6 Mbps
611 Mbps -
11000 Mbps
The top data rate for Arria V is 6553.6 Mbps, for Stratix V it is
11000 Mbps. Refer to “Sample Channel WIdth Options for
Supported Serial Data Rates” on page 9–7 for sample the channel
widths that support these data rates.