User guide

8–12 Chapter 8: Low Latency PHY IP Core
Interfaces
Altera Transceiver PHY IP Core March 2012 Altera Corporation
User Guide
h For more information about the Pin Planner, refer to About the Pin Planner in
Quartus II Help. For more information about the Assignment Editor, refer to About
the Assignment Editor in Quartus II Help.
f For more information about Quartus II Settings, refer to Quartus II Settings File
Manual.
Interfaces
This section describes interfaces of the Low Latency Transceiver PHY. It includes the
following topics:
■ Ports
■ Register Interface
■ Dynamic Reconfiguration
Ports
Figure 8–2 illustrates the top-level signals of the Custom PHY IP core. The variables in
Figure 8–2 represent the following parameters:
■ <n>—The number of lanes
■ <w>—The width of the FPGA fabric to transceiver interface per lane
1 By default block diagram shown in the parameter editor labels the external pins with
the interface type and places the interface name inside the box. The interface type and
name are used in the _hw.tcl file that describes the component. If you turn on Show
signals, the block diagram displays all top-level signal names.
Figure 8–2. Top-Level Low Latency Signals
Low Latency PHY IP Core Top-Level Signals
tx_serial_data<n>
rx_serial_data<n>
rx_is_lockedtodata[<n>-1:0]
rx_is_lockedtoref[<n>-1:0]
pll_locked[<n>-1:0]
tx_bitslip
pll_powerdown
tx_digitalreset<n>
tx_analogreset<n>
tx_cal_busy<n>
rx_digitalreset<n>
rx_analogreset<n>
rx_cal_busy<n>
reconfig_to_xcvr[(<n>70-1):0]
reconfig_from_xcvr[(<n>46-1):0]
Optional
Status
tx_parallel_data[<n><w>-1:0]
tx_clkout[<n>-1:0]
rx_parallel_data[<n><w>-1:0]
rx_clkout[<n>-1:0]
tx_ready[<n>-1:0]
rx_ready[<n>-1:0]
phy_mgmt_clk
phy_mgmt_clk_reset
phy_mgmt_address[8:0]
phy_mgmt_writedata[31:0]
phy_mgmt_readdata[31:0]
phy_mgmt_write
phy_mgmt_read
phy_mgmt_waitrequest
pll_ref_clk
tx_coreclkin[<n>-1:0]
rx_coreclkin[<n>-1:0]
Avalon-MM PHY
Management
Interface
Avalon-ST TX and RX
to and from MAC
Serial
Data
Dynamic
Reconfiguratio
n
Reset Control
and Status
(Optional)
Clocks
Optional