User guide

7–10 Chapter 7: Custom PHY IP Core
Parameter Settings
Altera Transceiver PHY IP Core March 2012 Altera Corporation
User Guide
Analog Options
You specify the analog parameters for Stratix V devices using the Quartus II
Assignment Editor, the Pin Planner, or through the Quartus II Settings File (.qsf). The
default values for analog options fall into three categories:
■ Global— These parameters have default values that are independent of other
parameter settings.
■ Computed—These parameters have an initial default value that is recomputed
based on other parameter settings.
■ Proxy—These parameters have default values that are place holders. The
Quartus II software selects these initial default values based on your design;
however, Altera recommends that you replace these defaults with values that
match your electrical board specification.
Table 7–11 lists the analog parameters for Stratix V devices whose original values are
place holders for the values that match your electrical board specification. In
Table 7–11, the default value of an analog parameter is shown in bold type.
Channel Interface
Enable channel interface On/Off
Turn this option on to enable PLL and datapath dynamic
reconfiguration. When you select this option, the width of
tx_parallel_data and rx_parallel_data buses increases in
the following way.
■ The tx_parallel_data bus is 44 bits per lane; however, only
the low-order number of bits specified by the FPGA fabric
transceiver interface width contain valid data for each lane.
■ The rx_parallel_data bus is 64 bits per lane; however, only
the low-order number of bits specified by the FPGA fabric
transceiver interface width contain valid data.
Table 7–10. PLL Reconfigurations
Name Value Description
Table 7–11. Transceiver and PLL Assignments for Stratix V Devices (Sheet 1 of 2)
QSF Assignment Name
Pin Planner and
Assignment Editor
Name
Description Options
Assign
To
XCVR_IO_PIN_TERMINATION
Transceiver I/O Pin
Termination
Specifies the intended on-chip
termination value for the specified
transceiver pin. Use External Resistor
if you intend to use off-chip
termination.
85_OHMS
100_OHMS
120_OHMS
150_OHMS
EXTERNAL_
RESISTOR
Pin
XCVR_REFCLK_PIN_
TERMINATION
Transceiver Dedicated
Refclk Pin Termination
Specifies the intended termination
value for the specified refclk pin.
DC_COUPLING_
INTERNAL_100
_OHM
DC_COUPLING_
EXTERNAL_
RESISTOR
AC_COUPLING
Pin