Specifications

1–16 Chapter 1: Nios II Hardware Development
Creating the Design Example
Nios II Hardware Development Tutorial May 2011 Altera Corporation
Figure 1–7 shows the Caches and Memory Interfaces tab of the Nios II Processor
parameter editor.
1 Do not change any settings on the Advanced Features, MMU and MPU Settings,
JTAG Debug Module, or Custom Instruction tabs.
19. Click Finish. You return to the Qsys System Contents tab.
f For more information about configuring the Nios II core, refer to the Instantiating the
Nios II Processor in Qsys chapter of the Nios II Processor Reference Handbook.
f For more information about connecting memory to Nios II systems, refer to the System
Design with Qsys section of Volume 1: Design and Synthesis of the Quartus II Handbook.
Figure 1–7. Nios II Parameter Editor – Caches and Memory Interfaces Tab