Specifications

Chapter 1: Nios II Hardware Development 1–15
Creating the Design Example
May 2011 Altera Corporation Nios II Hardware Development Tutorial
Figure 1–6 shows the Core Nios II tab of the Nios II Processor parameter editor.
15. Click the Caches and Memory Interfaces tab. Figure 1–7 shows the GUI.
16. In the Instruction cache list, select 2Kbytes.
17. In the Burst transfers list, select Disable.
18. In the Number of tightly coupled instruction master port(s) list, select None.
Figure 1–6. Nios II Parameter Editor – Core Nios II Tab